1. Field of the Invention
The embodiments discussed herein are related to a semiconductor device.
2. Background of the Related Art
In recent years semiconductor devices which also have resistance to a large-current and high-voltage operating environment have come into use in robots, machine tools, electric vehicles, and the like as power converters for driving a motor. Such semiconductor devices are mainly formed by the use of power semiconductor elements such as insulated gate bipolar transistors (IGBTs) and freewheeling diodes (FWDs).
Usually a semiconductor device has the following structure. A semiconductor chip is mounted over an insulating substrate. For example, the semiconductor chip and a circuit pattern of the insulating substrate or the semiconductor chip and internal terminals in a case are connected by the use of a conductive member (see, for example, International Publication Pamphlet No. WO2013/118415 (paragraph [0002], FIG. 16)). That is to say, circuit patterns are formed over both surfaces of the insulating substrate. A circuit pattern formed over one surface is bonded with solder to a heat radiation base. The semiconductor chip and lead-out terminals are bonded with solder to a circuit pattern formed over the other surface of the insulating substrate. Furthermore, for example, the semiconductor chip and the circuit pattern or the semiconductor chip and the internal terminals in the case are bonded together by the use of bonding wires.
Aluminum bonding wires, for example, are used as the bonding wires and are bonded to the semiconductor chip and the circuit pattern by ultrasonic welding or the like. The cross-sectional area of a bonding wire is small. Therefore, bonding wires whose number corresponds to a current capacity are connected in parallel in a wiring portion through which a principal current flows.
With a semiconductor device in which wiring is performed in this way by the use of bonding wires, heat generated by a semiconductor chip is transferred to a heat radiation base via an insulating substrate and is radiated from the heat radiation base to the outside. However, because there are demands for an increase in rated current and a decrease in chip size, semiconductor chips generate much heat at energization time. This causes a great rise in temperature. As a result, a bonding wire peels off a bonding area of a semiconductor chip or radiation of heat from a heat radiation base becomes insufficient.
On the other hand, there are semiconductor devices in which wiring is performed by the use of copper lead plates in place of bonding wires. Because the cross-sectional area of a copper lead plate is larger than that of a bonding wire, a copper lead plate is advantageous as a conductive connecting member used in a portion through which a large current flows. A lead plate is connected to a main electrode of a semiconductor chip with solder and is connected to a circuit pattern of an insulating substrate with solder or by welding.
With a semiconductor chip in which copper lead plates are used as a wiring material, the copper lead plates are soldered to electrodes of the semiconductor chip made of silicon (Si) or silicon carbide (SiC). The copper lead plates and the semiconductor chip differ in the linear expansion coefficient of a material. As a result, the reliability of solder at the interface between the copper lead plates and the semiconductor chip is deteriorated significantly by thermal stress created due to the difference in the linear expansion coefficient of a material between them. That is to say, if excessive distortion exceeding an allowable value is applied to the solder, a crack appears in the solder. The crack propagates by heat cycles. The propagation of the crack leads to an increase in the thermal resistance of the solder and a decrease in the heat radiation effect of the solder. This shortens the fatigue life of the solder. Accordingly, a case in which a semiconductor chip is held is sealed with gel to integrally fasten the internal structure with the gel. By doing so, the fatigue life of solder is lengthened. In this case, the semiconductor chip is sealed with the gel and the gel is hardened. As a result, heat generated by the semiconductor chip accumulates in the gel.
Therefore, a semiconductor device in which heat generated by a semiconductor chip is radiated not only from a heat radiation base but also from a side opposite to the heat radiation base is proposed (see, for example, Japanese Laid-open Patent Publication No. 2008-60531). This semiconductor device has the following structure. First and second non-planar insulating substrates each having a high thermal conductivity are electrically connected by posts. By doing so, a determined distance is kept between the first and second insulating substrates. A plurality of semiconductor chips and electronic parts are disposed between the first and second insulating substrates with solder stopper layers therebetween. As a result, heat generated by each semiconductor chip is radiated via the first and second insulating substrates disposed on both sides of it. Furthermore, main electrodes of each semiconductor chip are electrically connected via posts to circuit patterns formed over surfaces of the first and second insulating substrates opposite each other.
With the above semiconductor device (see, for example, International Publication Pamphlet No. WO2013/118415) bonding and wiring of a main electrode of the semiconductor chip are performed by the use of aluminum bonding wires. However, it is difficult to use a copper wire whose electrical resistivity is lower than that of an aluminum wire. That is to say, because copper is harder than aluminum, excess stress is applied at the time of bonding a copper wire, more particularly a thick copper wire to a semiconductor chip. As a result, the semiconductor chip may be destroyed.
Furthermore, the above semiconductor device (see, for example, Japanese Laid-open Patent Publication No. 2008-60531) is applicable only to a structure in which radiators can be disposed on both sides of a semiconductor chip. The solder stopper layers are used for bonding together the first and second non-planar insulating substrates having a high thermal conductivity and the semiconductor chips. This increases the height of the semiconductor device.